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Media Coverage |
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Azuro
in the news.
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| EDACafe, June 2008, Video interview at DAC with Paul Cunningham, CEO of Azuro |
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| SCDsource, June 24, 2008, "Optimize IC Power by Understanding Circuit Activity" |
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| SoC Central, June 9, 2008, "Low Power is Now a High Priority" |
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| Electronic Engineering Times, June 3, 2008, "TSMC Rolls 40-nm Design Flow" |
| Chip Design, January 31, 2008, "The Hidden Impact of
Circuit Activity on Power" |
| EE Times, November 9, 2007, "STARC Adopts Azuro's
Clock-Tree Synthesis" |
| Azuro's CEO Paul Cunningham named one of Business
Week's Best Young Entrepreneur's in Tech |
| Si2, Oct 5, 2006,
Si2 Announces Formation of Low Power Coalition |
| EE Times, July 24, 2006, "Using Statistical Activity
for Power Estimation" |
| EE Times, July 5, 2006, "Power reduction tool extends
to 65-nm" |
| Electronic News, July 5, 2006, "Azuro Cuts Power in
65nm Designs" |
| Electronic Business, June 1, 2006, "Burn Baby, Burn" |
| EE Times, January 5, 2006, "Clock-tree Design Startup
Raises $9 Million" |
| EDN
Magazine, December 12, 2005, "The Hot 100 Products of 2005" |
| Chip Designer, November/December 2005, "Power Drivers
and Power Metrics" |
| EE Times, June 13, 2005, "Who to Watch at DAC" |
| EE Times, June 13, 2005, "Whizzy New Tools Dangled at
DAC" |
| SOC central, June 6, 2005, "Azuro Unveils Low Power
Clock Implementation" |
| EDN, May 17, 2005, "Power-savvy Tool Replaces
Clock-tree Synthesis" |
| EE Times, May 16, 2005, "Startup Targets Power
Problems in Wireless IC Design" |
| Electronics Weekly, May 16, 2005, "Azuro Targets Clock
Tree Power" |
| Semiconductor
Times, July 2004 (321 KB PDF file) |
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